Gur Eliash founder, CEO


Gur has a B.Sc. in Computer Engineering from the Technion, Israeli Institute of Technology.

Gur has vast of experience in design & verification of VLSI projects. He gained his extensive technical and managerial background while working for Rafael, Verisity (Cadence), Passave (PMC) and Tehuti Networks.

Gur was one of the pioneers to adopt SystemVerilog as a Verification Language.

 

 

 
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